A comprehensive study on Cu-doped ZnO (CZO) interlayered MOS structure

Cokduygulular E., ÇETİNKAYA Ç., Yalcin Y., KINACI B.

JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, vol.31, no.16, pp.13646-13656, 2020 (SCI-Expanded) identifier identifier

  • Publication Type: Article / Article
  • Volume: 31 Issue: 16
  • Publication Date: 2020
  • Doi Number: 10.1007/s10854-020-03922-6
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus, Aerospace Database, Applied Science & Technology Source, Chemical Abstracts Core, Communication Abstracts, Compendex, Computer & Applied Sciences, INSPEC, Metadex, Civil Engineering Abstracts
  • Page Numbers: pp.13646-13656
  • Istanbul University Affiliated: Yes


We present the structural, morphological, and electrical analysis of the copper-doped (wt 3%) ZnO (CZO) thin film grown with the RF sputtering system. CZO thin films were deposited on both soda-lime silicate glass and n-type (100)-oriented GaAs substrates. Following CZO thin-film deposition, samples were annealed at various temperatures ranging from 300 to 600 degrees C (by step 100 degrees C). Structural properties of the as-deposited CZO thin films grown on soda-lime silicate substrate and annealed at different temperatures (300 degrees C, 400 degrees C, 500 degrees C, 600 degrees C) were characterized by X-ray diffraction (XRD) measurements. It was seen that CZO thin film with 600 degrees C annealed temperature has the best peak compared to other annealed samples. Surface morphology of the CZO thin film with 600 degrees C annealed temperature was investigated by utilizing atomic force microscopy (AFM) and scanning electron microscopy (SEM) measurements. AFM and SEM results have shown that CZO with 600 degrees C annealed temperature has low surface roughness and good homogeneity. CZO thin film with 600 degrees C annealed temperature deposited on the n-GaAs substrate was used for electrical characterizations. C-V and G/omega-V forward and reverse bias measurements between - 2 and 4 V of Au/CZO/n-GaAs MOS structure with an annealing temperature of 600 degrees C were performed in the temperature range from 200 to 380 K (by step 30 K) at 1 MHz. It was observed to exhibit negative capacitance (NC) behavior for high-temperature region (320-380 K) from C-V measurements at forward bias voltage.