Ultra-Low Voltage VDCC Design by Using DTMOS

Basak M. E., Kacar F.

ACTA PHYSICA POLONICA A, vol.130, no.1, pp.223-225, 2016 (SCI-Expanded) identifier identifier

  • Publication Type: Article / Article
  • Volume: 130 Issue: 1
  • Publication Date: 2016
  • Doi Number: 10.12693/aphyspola.130.223
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus
  • Page Numbers: pp.223-225
  • Istanbul University Affiliated: No


In this paper, a new ultralow voltage and ultralow power voltage differencing current conveyor based on dynamic threshold voltage MOS transistors was proposed. The simulations were performed by using LTSpice Program with TSMC CMOS 0.18 mu m process parameters. A new notch filter configuration was also presented as an application for the proposed voltage differencing current conveyor. The power consumption of proposed voltage differencing current conveyor was simply 12.42 nW at symmetric +/- 0.2 V supply voltage. The simulation results were found in close agreement with the theoretical results.