A multi channel chopper modulated neural recording system


Dagtekin M. , Liu W., Bashirullah R.

23rd Annual International Conference of the IEEE-Engineering-in-Medicine-and-Biology-Society, İstanbul, Türkiye, 25 - 28 Ekim 2001, cilt.23, ss.757-760 identifier identifier

  • Cilt numarası: 23
  • Doi Numarası: 10.1109/iembs.2001.1019051
  • Basıldığı Şehir: İstanbul
  • Basıldığı Ülke: Türkiye
  • Sayfa Sayıları: ss.757-760

Özet

Presented herein is a fully integrated low-noise CMOS multi-channel amplifier for neural recording applications. The circuit employs the chopper modulation technique to reduce the effect of flicker noise and DC offset. A reduced area design implementation is achieved by trading off the increased noise margin performance of the chopper modulator for minimal amplifier area and analog multiplexing of the recording sites. A fully differential topology is used for the signal path to improve noise immunity. The analog amplifier exhibits 56 dB of gain with a 115 kHz bandwidth and a common mode rejection ratio (CNIRR) of 80 dB. Simulation results show a total input referred noise less than 16 nV/rootHz. The system power consumption is approximately 750 muWatts. The fully integrated system was designed in ABN 1.6-um single poly n-well CMOS process.

Presented herein is a fully integrated low-noise CMOS multi-channel amplifier for neural recording applications. The circuit employs the chopper modulation technique to reduce the effect of flicker noise and DC offset. A reduced area design implementation is achieved by trading off the increased noise margin performance of the chopper modulator for minimal amplifier area and analog multiplexing of the recording sites. A fully differential topology is used for the signal path to improve noise immunity. The analog amplifier exhibits 56 dB of gain with a 115 kHz bandwidth and a common mode rejection ratio (CNIRR) of 80 dB. Simulation results show a total input referred noise less than 16 nV/rootHz. The system power consumption is approximately 750 muWatts. The fully integrated system was designed in ABN 1.6-um single poly n-well CMOS process.