Low-Latency 1.5-Bit Quantizer for a 400 Mbps Continuous-Time Sigma-Delta Modulator in 65 nm CMOS for Biomedical Instrumentation
2025 International Circuits and Systems Symposium-ICSYS-Annual, Kuala-Lumpur, Malezya, 24 - 26 Kasım 2025, ss.104-107, (Tam Metin Bildiri)
- Yayın Türü: Bildiri / Tam Metin Bildiri
- Doi Numarası: 10.1109/icsys65149.2025.11379881
- Basıldığı Şehir: Kuala-Lumpur
- Basıldığı Ülke: Malezya
- Sayfa Sayıları: ss.104-107
- İstanbul Üniversitesi Adresli: Hayır
Özet
This paper presents the design and post-layout simulation of a 1.5 bit flash quantizer operating at 400 Mbps for integration in a continuous-time (CT) sigma-delta modulator targeting biomedical instrumentation applications. The quantizer adopts an over-range tolerant scheme to enhance modulator stability and relax comparator precision requirements, offering improved robustness against device mismatch. A fully differential preamplifier-dynamic latch comparator pair is employed to achieve low decision latency while maintaining high linearity, with careful device sizing and common-centroid layout techniques used to minimize input offset. Post-layout simulation in a 65 nm CMOS process confirm correct operation at 400 Mbps with a decision delay below 400 ps and negligible metastability. The design achieves a peak SNDR of 71 dB over a 6 MHz bandwidth, consuming only 65 uW from a 1.2 V supply, and occupies 0.2025 mm2 active area. These results demonstrate the suitability of the proposed quantizer for compact, energy- efficient CT sigma-delta modulators in medical imaging and bio-signal/cell analysis applications.