A 0.8 mm(2) Sub-GHz GaAs HBT Power Amplifier for 5G Application Achieving 57.5% PAE and 28.5 dBm Maximum Linear Output Power


Nitesh R. S., Rajendran J., Ramiah H., Yarman B. S.

IEEE ACCESS, vol.7, pp.158808-158819, 2019 (SCI-Expanded, Scopus)

  • Publication Type: Article / Article
  • Volume: 7
  • Publication Date: 2019
  • Doi Number: 10.1109/access.2019.2949369
  • Journal Name: IEEE ACCESS
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus
  • Page Numbers: pp.158808-158819
  • Istanbul University Affiliated: Yes

Abstract

This paper presents a comprehensive design of a fully integrated multistage GaAs HBT power amplifier that achieves both linearity and high efficiency within a chip area of 0.855 mm(2) for 4G and 5G applications covering the lower frequency band of 700-800 MHz. A novel linearizer circuit is integrated to a dual stage class-AB PA to minimize the AM-PM (Amplitude Modulation-Phase Modulation) distortion generated by the parasitic capacitance at the PN-junction under low bias current condition. The linearized power amplifier is able to operate within a 100 MHz linear operating bandwidth (700-800 MHz) while meeting the adjacent channel leakage ratio (ACLR) specification for 4G and 5G application. The fully integrated PA achieves a wideband efficiency of 57.5% at 28.5 dBm output power. Observing a respective input and output return losses of less than 13 dB and 10 dB, the PA delivers a power gain within the range of 34.0-37.0 dB across the operating bandwidth while exhibiting an unconditional stability characteristic from DC up to 5 GHz. The proposed linearization method paves the way of reducing the complexity of linear and high efficiency PA design which is associated with complicated and high-power consumption linearization schemes.