An 0.4-2.8 GHz CMOS Power Amplifier With On-Chip Broadband-Pre-Distorter (BPD) Achieving 36.1-38.6% PAE and 21 dBm Maximum Linear Output Power

Mariappan S., Rajendran J., Yusof Y. M., Noh N. M., Yarman B. S.

IEEE ACCESS, cilt.9, ss.48831-48840, 2021 (SCI-Expanded) identifier identifier

  • Yayın Türü: Makale / Tam Makale
  • Cilt numarası: 9
  • Basım Tarihi: 2021
  • Doi Numarası: 10.1109/access.2021.3068482
  • Dergi Adı: IEEE ACCESS
  • Derginin Tarandığı İndeksler: Science Citation Index Expanded (SCI-EXPANDED), Scopus, Compendex, INSPEC, Directory of Open Access Journals
  • Sayfa Sayıları: ss.48831-48840
  • İstanbul Üniversitesi Adresli: Evet

Özet

A broadband 180 nm CMOS power amplifier (PA) operating from a frequency bandwidth of 400 MHz to 2.8 GHz is presented in this paper. The PA is integrated with an inductor-less Broadband-Pre-Distorter (BPD) to enhance its linearity for wide bandwidth. The BPD consists only of MOS transistors, resistors, and capacitors which contribute to the wideband operation thus independent of the Q factor of passive inductors which contributes to the effectiveness of many other APDs available. The integrated BPD improves the Amplitude Modulation-to-Amplitude Modulation (AM-AM) and Amplitude Modulation-to-Phase Modulation (AM-PM) deviation of the PA across maximum linear output power of 21 dBm. Utilizing a silicon area of 1.69 mm(2), mounted on Roger's RO4000/FR4 PCB, the BPD-PA produces a maximum output power of more than 22 dBm for 2.4 GHz bandwidth with a minimum power gain of 15 dB. The corresponding peak power added efficiency (PAE) of more than 35% is achieved across the operating bandwidth. The fabricated BPD-PA meets the Adjacent Channel Leakage Ratio (ACLR) specification of -30 dBc at a maximum linear output power of 21 dBm (3 dB back-off from maximum output power) when tested with 20 MHz LTE signal at 1.7 GHz.